A 2×2 bit binary multiplier takes two 2-bit numbers as inputs and multiplies them together to produce a 4-bit output.
Let the first 2-bit number (multiplicand) be A = A₁A₀ and the second 2-bit number (multiplier) be B = B₁B₀. The final 4-bit product is represented as P = P₃P₂P₁P₀. The Multiplication Process
Binary multiplication follows the same “shift and add” logic as decimal long multiplication:
A1 A0 (Multiplicand) × B1 B0 (Multiplier) ————— A1B0 A0B0 (Partial Product 1) + A1B1 A0B1 (Partial Product 2, shifted left by 1 bit) ————— P3 P2 P1 P0 (Final Product Bits) Use code with caution. P₀ is simply the result of A₀ ⋅ B₀.
P₁ is the sum of A₁B₀ and A₀B₁. Any carry generated here goes to the next column.
P₂ and P₃ are calculated by adding the remaining partial product A₁B₁ to the carry bit from the P₁ column. Complete Truth Table
Because there are two 2-bit inputs, there are 4 input bits in total (A₁, A₀, B₁, B₀). This yields 2⁴ = 16 possible input combinations. The table below maps every input to its corresponding decimal and binary output: Decimal Multiplicand (A) Decimal Multiplier (B) Binary Input (A₁ A₀) Binary Input (B₁ B₀) Decimal Product Final Product Bits (P₃ P₂ P₁ P₀) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 1 1 0 1 1 0 1 0 0 1 Boolean Logic Expressions
By simplifying the truth table using Boolean algebra or Karnaugh Maps (K-maps), we can derive the logic gates required to build this circuit physically:
P₀ = A₀ ⋅ B₀ (A single AND gate handles the least significant bit). (The XOR of the two middle partial products). .
P₃ = A₁ ⋅ A₀ ⋅ B₁ ⋅ B₀ (Only outputs 1 when 3 × 3 = 9, which is 1001 in binary).